8 cores, 20 gigabits of Ethernet, and a system-on-a-chip on a system-on-a-chip.
by Peter Bright - Aug 11 2014
This is what Seattle looks like underneath its heatsink.
First unveiled in January, AMD today gave a detailed look at its first ARM-based server processor, the Opteron A1100 "Seattle."
Seattle has eight 64-bit ARM Cortex-A57 cores arranged into four pairs, with each pair sharing 1MB of level 2 cache. All eight cores share an 8 MB level 3 cache. There are two memory controllers, supporting both DDR3 and DDR4, enabling a total of 128GB ECC memory in total.
These cores all share a set of I/O options. The system-on-a-chip has 8 lanes of PCIe 3.0 for expansion cards and 8 lanes of SATA revision 3.0 for storage. Network connectivity comes from two 10GBASE-KR controllers. (10GBASE-KR is a short-range specification designed for copper connections to backplanes in blade servers and modular routers.)
The SoC also includes a couple of other processing elements, such as a cryptographic coprocessor that accelerates AES, elliptic curve, and RSA encryption, SHA hashing, and zlib compression and decompression.
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